Comparison ledger
EV Group 101, OAI 6000, side by side. Every value shown is drawn from the cited encyclopedia entries.
| Attribute | 101EV Group | 6000OAI |
|---|---|---|
| OEM | EV Group | OAI |
| Category | Lithography | Lithography |
| Wafer size | — | — |
| Process node | — | — |
| Introduced | — | — |
| Production run | — | — |
| Lifecycle | — | — |
| Lifecycle milestones | — | — |
| Control system | — | — |
| Generation | — | — |
| Family | EV Group 101 | OAI 6000 |
| Specifications | ||
| OEM | EV Group[1] | — |
| Model | 101[1] | — |
| Equipment name | EVG 101 Spray Coater[1] | — |
| NEMO ID | evgspraycoat[1] | — |
| Training required | EVG 101 Training[1] | — |
| Training duration | 1.50 hours[1] | — |
| Processing technique | Resist Spray Coat (manual)[1] | — |
| Cleanliness | "All"[1] | — |
| Location | SNF Paul G Allen L107 Cleanroom[1] | — |
| Wafer diameter (substrate size) | up to 300 mm[2] | — |
| Available modules | Spin coat / OmniSpray® / develop[2] | — |
| Wafer handling options | Bowed / warped / thin wafer handling, edge handling[2] | — |
| Dispense options | Various resist dispense pumps covering viscosities up to 52000 cP; constant pressure dispense systems; EBR / BSR / pre-wet / bowl wash / liquid priming[2] | — |
| Processing technique (at SNF) | Resist Spray Coat (manual)[3] | — |
| Cleanliness group (at SNF) | "All"[1] | — |
| Product name | — | Model C&D P9000 / OAI 6000: Integrated Lithography Cell[4] |
| System type | — | Integrated lithography cell[4] |
| Process steps | — | Coat | Bake | Align/Expose | Develop[4] |
| Manufacture | — | Fully manufactured in the USA[4] |
| Configuration | — | Cluster configuration[4] |
| Wafer flow | — | Allows for dynamic wafer flow and parallel application processing[4] |
| Control interface | — | Single terminal for control over recipe and program selection; P9000 performs as the master user interface[4] |
| Operator requirement | — | Fewer operators needed in the lithography module[4] |
| Wafer handling | — | Reduced wafer handling[4] |
| Footprint | — | Small footprint[4] |
| Wafer size capability | — | Multiple wafer sizes can be processed simultaneously[4] |
| Product class | — | Automated Front & Backside Mask Aligner[5] |
| Application area | — | For production semiconductors, MEMS, sensors, advanced packaging, IOT, microfluidics[5] |
| Type | — | Automated Front & Backside Mask Aligner System / Integrated Lithography Cell[5] |
| Capabilities | — | Coat, Bake, Align/Expose, Develop[4] |
| Country of Manufacture | — | USA[4] |
| Wafer Size Support | — | Multiple wafer sizes can be processed simultaneously[4] |
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